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ITF86182SK8T
Data Sheet January 2000 File Number 4797.2
11A, 30V, 0.0115 Ohm, P-Channel, Logic Level, Power MOSFET
Features
* Ultra Low On-Resistance
[ /Title - rDS(ON) = 0.0115, VGS = -10V Packaging (ITF86 - rDS(ON) = 0.016, VGS = -4.5V SO8 (JEDEC MS-012AA) - rDS(ON) = 0.0175, VGS = -4V 182SK BRANDING DASH 8T) * Gate to Source Protection Diode /Sub* Simulation Models ject - Temperature Compensated PSPICETM and SABER 5 (11A, Electrical Models 30V, - Spice and SABER Thermal Impedance Models 1 2 - www.intersil.com 0.0115 3 4 Ohm, * Peak Current vs Pulse Width Curve P* Transient Thermal Impedance Curve vs Board Mounting ChanArea Symbol nel, * Switching Time vs RGS Curves Logic SOURCE(1) DRAIN(8) Level, Ordering Information Power SOURCE(2) DRAIN(7) PART NUMBER PACKAGE BRAND MOSITF86182SK8T SO8 86182 FET) NOTE: When ordering, use the entire part number. ITF86182SK8T SOURCE(3) DRAIN(6) /Author is available only in tape and reel. DRAIN(5) () GATE(4) /Keywords (InterITF86182SK8T UNITS sil, Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS -30 V SemiDrain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR -30 V conduc- Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS 20 V tor, PDrain Current Continuous (TA= 25oC, VGS = 10V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -11.0 A ChanContinuous (TA= 25oC, VGS = 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -9.0 A nel, Continuous (TA= 100oC, VGS = 4.5V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -6.0 A Logic Continuous (TA= 100oC, VGS = 4.0V) (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID -6.0 A Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Figure 4 Level 2.5 W Power Power Dissipation (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mW/oC MOSoC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 150 FET, Maximum Temperature for Soldering oC SO8) Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL 300
Package Body for 10s, See Tech brief TB370 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 260
oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. TJ = 25oC to 125oC. 2. 50oC/W measured using FR-4 board with 0.76 in2 (490.3 mm2) copper pad at 10 second.
1
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. PSPICE(R) is a registered trademark of MicroSim Corporation. SABER(c) is a Copyright of Analogy Inc.http://www.intersil.com or 321-727-9207 | Copyright (c) Intersil Corporation 2000
ITF86182SK8T
Electrical Specifications
PARAMETER TA = 25oC, Unless Otherwise Specified SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
ITF86182SK8TOFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current BVDSS IDSS IGSS VGS(TH) rDS(ON) ID = 250A, VGS = 0V Figure 11 VDS = -30V, VGS = 0V VGS = 20V VGS = VDS, ID = 250A Figure 10 ID = -11.0A, VGS = -10V Figures 8, 9 ID = -6.0A, VGS = -4.5V Figure 8 ID = -6.0A, VGS = -4.0V Figure 8 ITF86182SK8TTHERMAL SPECIFICATIONS Thermal Resistance Junction to Ambient RJA Pad Area = 0.76 in2 (490.3 mm2) (Note 2) Pad Area = 0.054 in2 (34.8 mm2) Figure 20 Pad Area = 0.0115 in2 (7.42 mm2) Figure 20 ITF86182SK8TSWITCHING SPECIFICATIONS (VGS = -4.5V) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) tf td(ON) tr td(OFF) tf Qg(TOT) Qg(-5) Qg(TH) Qgs Qgd CISS COSS CRSS VDS = -25V, VGS = 0V, f = 1MHz Figure 12 VGS = 0V to -10V VGS = 0V to -5V VGS = 0V to -1V VDD = -15V, ID = -6.0A, Ig(REF) = -1.0mA Figures 13, 16, 17 VDD = -15V, ID = -11.0A VGS = -10V, RGS = 4.9 Figures 15, 18, 19 VDD = -15V, ID = -6.0A VGS = -4.5V, RGS = 4.9 Figures 14, 18, 19 20 80 70 80 ns ns ns ns 50 152 189
oC/W oC/W oC/W
-30 -
-
-1 10 -2.5 0.0115 0.016 0.0175
V A uA
ITF86182SK8TON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance -1.0 0.0085 0.011 0.012 V
ITF86182SK8TSWITCHING SPECIFICATIONS (VGS = -10V) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time 16 85 100 105 ns ns ns ns
ITF86182SK8TGATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at -5V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge 67 37 3.4 8 13.5 nC nC nC nC nC
ITF86182SK8TCAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance 3375 790 375 pF pF pF
Source to Drain Diode Specifications
PARAMETER Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL VSD trr QRR ISD = -6.0A ISD = -6.0A, dISD/dt = 100A/s ISD = -6.0A, dISD/dt = 100A/s TEST CONDITIONS MIN TYP -0.8 33 20 MAX UNITS V ns nC
2
ITF86182SK8T Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 0 25 50 75 100 125 150 25 50 75 100 120 150 TA , AMBIENT TEMPERATURE (oC) TA, AMBIENT TEMPERATURE (oC) -12 VGS = -10V, RJA = 50oC/W ID, DRAIN CURRENT (A) -9
-6
-3 VGS = -4.0V, RJA = 189oC/W
FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs AMBIENT TEMPERATURE
3 1 THERMAL IMPEDANCE ZJA, NORMALIZED
DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01
RJA = 50oC/W
0.1 PDM 0.01 SINGLE PULSE 0.001 10-5 10-4 10-3 10-2 10-1 100 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 101 102 103
t, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
-1000
RJA = 50oC/W
TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS:
IDM, PEAK CURRENT (A)
-100 VGS = -4.5V
I = I25
150 - TA 125
-10 -5
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
10-5
10-4
10-3
10-2
10-1 t, PULSE WIDTH (s)
100
101
102
103
FIGURE 4. PEAK CURRENT CAPABILITY
3
ITF86182SK8T Typical Performance Curves
-300
(Continued)
ID, DRAIN CURRENT (A)
RJA = 50oC/W 100s
ID, DRAIN CURRENT (A)
-100
SINGLE PULSE TJ = MAX RATED TA = 25oC
-40 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDD = 15V -30
-20 TJ = 150oC -10 TJ = 25oC
-10 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) -1 -1 -10 VDS, DRAIN TO SOURCE VOLTAGE (V) -100
10ms 0 -1
TJ = -55oC
-1.5 -2.0 -2.5 VGS, GATE TO SOURCE VOLTAGE (V)
-3.0
FIGURE 5. FORWARD BIAS SAFE OPERATING AREA
FIGURE 6. TRANSFER CHARACTERISTICS
-40 rDS(ON), DRAIN TO SOURCE ON RESISTANCE (m) VGS = -10V VGS = -5V -30 VGS = -4.5V VGS = -3.5V -20 VGS = -3V -10 TA = 25oC 0 0 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX -1
25 ID = -11A 20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
15
10
ID = -2A
5 -2 -4 -6 -8 -10
-0.2 -0.4 -0.6 -0.8 VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. SATURATION CHARACTERISTICS
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
NORMALIZED DRAIN TO SOURCE ON RESISTANCE
1.6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 1.4 NORMALIZED GATE THRESHOLD VOLTAGE
1.2 VGS = VDS, ID = -250A 1.0
1.2 VGS = -10V, ID = -11A 1.0
0.8
0.6
0.8
0.6 -80 -40 0 40 80 120 160
0.4 -80 -40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE
4
ITF86182SK8T Typical Performance Curves
NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.10 ID = -250A 1.05 C, CAPACITANCE (pF)
(Continued)
5000 CISS = CGS + CGD
COSS CDS + CGD
1.0
1000
0.95
0.90 -80 -40 0 40 80 120 160
VGS = 0V, f = 1MHz 300 -0.1 -1
CRSS = CGD
-10
-30
TJ , JUNCTION TEMPERATURE (oC)
VDS , DRAIN TO SOURCE VOLTAGE (V)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
-10
VGS , GATE TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
400
VDD = -15V
SWITCHING TIME (ns)
VGS = -4.5V, VDD = -15V, ID = -6A tr 300
-8
-6
200
tf td(OFF)
-4 WAVEFORMS IN DESCENDING ORDER: ID = -11A ID = -2A 0 15 30 45 60 75
100 td(ON) 0 0 10 20 30 40 50
-2
0
Qg, GATE CHARGE (nC)
RGS, GATE TO SOURCE RESISTANCE ()
NOTE: Refer to Intersil Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
FIGURE 14. SWITCHING TIME vs GATE RESISTANCE
500 VGS = -10V, VDD = -15V, ID = -11A SWITCHING TIME (ns) 400 td(OFF) tf 300
200 tr 100 td(ON) 0 0 10 20 30 40 50
RGS, GATE TO SOURCE RESISTANCE (W)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
5
ITF86182SK8T Test Circuits and Waveforms
Qgs RL 0 VGS= -1V VGS VDD
+
VDS
Qgd
VDS
Qg(TH)
-VGS Qg(-5) VDD Qg(TOT) 0 Ig(REF)
VGS= -5V
DUT Ig(REF)
VGS= -10V
FIGURE 16. GATE CHARGE TEST CIRCUIT
FIGURE 17. GATE CHARGE WAVEFORMS
tON td(ON) RL VDS VGS +
tOFF td(OFF) tr tf 10% 10%
0
0V RGS -VGS DUT 0
VDS
90%
90%
10% 50% VGS PULSE WIDTH 90% 50%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
FIGURE 19. SWITCHING TIME WAVEFORM
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJM, and the thermal resistance of the heat dissipating path determines the maximum allowable device power dissipation, PDM, in an application. Therefore the application's ambient temperature, TA (oC), and thermal resistance RJA (oC/W) must be reviewed to ensure that TJM is never exceeded. Equation 1 mathematically represents the relationship and serves as the basis for establishing the rating of the part.
( T JM - T A ) P DM = -----------------------------R JA
dissipation ratings. Precise determination of PDM is complex and influenced by many factors: 1. Mounting pad area onto which the device is attached and whether there is copper on one side or both sides of the board. 2. The number of copper layers and the thickness of the board. 3. The use of external heat sinks. 4. The use of thermal vias. 5. Air flow and board orientation. 6. For non steady state applications, the pulse width, the duty cycle and the transient thermal response of the part, the board and the environment they are in.
(EQ. 1)
In using surface mount devices such as the SO8 package, the environment in which it is applied will have a significant influence on the part's current and maximum power
6
ITF86182SK8T
Intersil provides thermal information to assist the designer's preliminary application evaluation. Figure 20 defines the RJA for the device as a function of the top copper (component side) area. This is for a horizontally positioned FR-4 board with 1oz copper after 1000 seconds of steady state power with no air flow. This graph provides the necessary information for calculation of the steady state junction temperature or power dissipation. Pulse applications can be evaluated using the Intersil device Spice thermal model or manually utilizing the normalized maximum transient thermal impedance curve. Displayed on the curve are RJA values listed in the Electrical Specifications table. The points were chosen to depict the compromise between the copper board area, the thermal resistance and ultimately the power dissipation, PDM. Thermal resistances corresponding to other copper areas can be obtained from Figure 20 or by calculation using Equation 2. RJA is defined as the natural log of the area times a coefficient added to a constant. The area, in square inches is the top copper area including the gate and source pads.
R JA = 83.2 - 23.6 x
240 RJA = 83.2 - 23.6*ln(AREA) 200 RJA (oC/W) 189oC/W - 0.0115in2
160
152oC/W - 0.054in2
120
80 0.01 0.1 AREA, TOP COPPER AREA (in2) 1.0
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD AREA
The transient thermal impedance (ZJA) is also effected by varied top copper board area. Figure 21 shows the effect of copper pad area on single pulse transient thermal impedance. Each trace represents a copper pad area in square inches corresponding to the descending list in the graph. Spice and SABER thermal models are provided for each of the listed pad areas. Copper pad area has no perceivable effect on transient thermal impedance for pulse widths less than 100ms. For pulse widths less than 100ms the transient thermal impedance is determined by the die and package. Therefore, CTHERM1 through CTHERM5 and RTHERM1 through RTHERM5 remain constant for each of the thermal models. A listing of the model component values is available in Table 1.
ln ( Area )
(EQ. 2)
150 COPPER BOARD AREA - DESCENDING ORDER 0.04 in2 0.28 in2 0.52 in2 0.76 in2 1.00 in2
120 ZJA, THERMAL IMPEDANCE (oC/W)
90
60
30
0 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) 102 103
FIGURE 21. THERMAL RESISTANCE vs MOUNTING PAD AREA
7
ITF86182SK8T PSPICE Electrical Model
.SUBCKT ITF86182SK8 2 1 3 ;
CA 12 8 2.2e-9 CB 15 14 2.6e-9 CIN 6 8 2.9e-9
ESG LDRAIN + 5 RLDRAIN EBREAK ESLC 50 DBODY + 17 18 DRAIN 2 RSLC1 51
REV Nov 1999
RSLC2
DPLCAP EVTHRES + 19 8 6
LGATE
EVTEMP RGATE 9
IT 8 17 1 LDRAIN 2 5 1.0e-9 LGATE 1 9 1.04e-9 LSOURCE 3 7 1.29e-10 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD
GATE 1 RLGATE
-
20 DESD1 91 DESD2
18 + 22
CIN
RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 2.3e-3 RGATE 9 20 4.3 RLDRAIN 2 5 10 RLGATE 1 9 10.4 RLSOURCE 3 7 1.29 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 4e-3 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
S1A 12 S1B CA 13 + EGS 6 8 13 8
S2A 14 13 S2B CB + EDS 5 8 14 IT 15 17
-
-
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*220),2.1))} .MODEL DBODYMOD D (IS = 1.1e-11 N = 1.03 RS = 5e-3 TRS1 = 1.75e-3 TRS2 = 5.08e-6 CJO = 2.17e-9 TT = 1e-10 M = 0.5) .MODEL DBREAKMOD D (RS = 1.9e-1 TRS1 = 1e-4 TRS2 = -1e-6) .MODEL DESD1MOD D (BV = 17.2 TBV1 = -2.5E-3 N = 21 RS = 500) .MODEL DESD2MOD D (BV = 17 TBV1 = -2.5E-3 N = 21 RS = 0) .MODEL DPLCAPMOD D (CJO = 1.6e-9 IS = 1e-30 N = 10 M = 0.37 VJ = 0.44) .MODEL MMEDMOD PMOS (VTO = -1.47 KP = 4 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 4.3) .MODEL MSTROMOD PMOS (VTO = -1.82 KP = 87 LAMBDA = 0.01 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD PMOS (VTO = -1.19 KP = 0.06 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 43 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 7.3e-4 TC2 = -8e-7) .MODEL RDRAINMOD RES (TC1 = 1e-2 TC2 = 1e-6) .MODEL RSLCMOD RES (TC1 = 2e-4 TC2 = -2e-5) .MODEL RSOURCEMOD RES (TC1 = 8e-4 TC2 = 1e-5) .MODEL RVTHRESMOD RES (TC1 = 1.5e-3 TC2 = 4.1e-6) .MODEL RVTEMPMOD RES (TC1 = -1.2e-3 TC2 = -1e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = 2.5 VOFF= 1.5) VON = 1.5 VOFF= 2.5) VON = 0.75 VOFF= -0.5) VON = -0.5 VOFF= 0.75)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
8
-
EBREAK 5 11 17 18 -36.2 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 5 10 8 6 1 EVTHRES 6 21 19 8 1 EVTEMP 6 20 18 22 1
5 51
+
DBODY 5 7 DBODYMOD DBREAK 7 11 DBREAKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 6 DPLCAPMOD
10
-
8 6
-
RDRAIN 21 16 MWEAK MMED MSTRO 8 RSOURCE DBREAK 11
LSOURCE 7 RLSOURCE SOURCE 3
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
ITF86182SK8T SABER Electrical Model
REV Nov 1999 template itf86182sk8 n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl = 1.1e-11, nl = 1.03, cjo = 2.17e-9, tt = 1e-10, m = 0.5, rs = 5e-3, trs1 = 1.75e-3, trs2 = 5.08e-6) dp..model dbreakmod = (rs = 1.9e-1, trs1 = 1e-4, trs2 = -1e-6) dp..model desd1mod = (bv = 17.2, nl = 21, rs = 500) dp..model desd2mod = (bv = 17, nl = 21, rs = 0) dp..model dplcapmod = (cjo = 1.6e-9, isl = 10e-30, nl = 10, m = 0.37, vj = 0.44) m..model mmedmod = (type=_p, vto = -1.47, kp = 4, is = 1e-30, tox = 1) m..model mstrongmod = (type=_p, vto = -1.82, kp = 87, lambda = 0.01, is = 1e-30, tox = 1) m..model mweakmod = (type=_p, vto = -1.19, kp = 0.06, is = 1e-30, tox = 1) ESG sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = 2.5, voff = 1.5) 5 -8+ sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = 1.5, voff = 2.5) 6 sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = 0.75, voff = -0.5) sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = -0.5, voff = 0.75) + 10 c.ca n12 n8 = 2.2e-9 c.cb n15 n14 = 2.6e-9 c.cin n6 n8 = 2.9e-9 dp.dbody n5 n7 = model=dbodymod dp.dbreak n7 n11 = model=dbreakmod dp.desd1 n91 n9 = model=desd1mod dp.desd2 n91 n7 = model=desd2mod dp.dplcap n10 n6 = model=dplcapmod i.it n8 n17 = 1 l.ldrain n2 n5 = 1e-9 l.lgate n1 n9 = 1.04e-9 l.lsource n3 n7 = 1.29e-10
GATE 1 RLGATE 91 DESD2 DPLCAP EVTHRES + 19 8 6 MSTRO CIN LSOURCE 8 RSOURCE RLSOURCE S1A S2A RBREAK 13 8 S1B 13 + EGS 6 8 EDS 14 13 S2B CB + 5 8 14 IT 15 17 18 RVTEMP 19 7 SOURCE 3 RSLC1 51 RSLC2 ISCL 50 RDRAIN 16 21 MWEAK MMED DBODY DBREAK
LDRAIN DRAIN 2 RLDRAIN
EBREAK 17 18
-
11
LGATE RGATE 9
EVTEMP
-
20 DESD1
18 + 22
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1 = 7.3e-4, tc2 = -8e-7 res.rdrain n50 n16 = 2.3e-3, tc1 = 1e-2, tc2 = 1e-6 res.rgate n9 n20 = 4.3 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 10.4 res.rlsource n3 n7 = 1.29 res.rslc1 n5 n51 = 1e-6, tc1 = 2e-4, tc2 = -2e-5 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 4e-3, tc1 = 8e-4, tc2 = 1e-5 res.rvtemp n18 n19 = 1, tc1 = -1.2e-3, tc2 = -1e-6 res.rvthres n22 n8 = 1, tc1 = 1.5e-3, tc2 = 4.1e-6 spe.ebreak n5 n11 n17 n18 = -36.2 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n5 n10 n8 n6 = 1 spe.evtemp n6 n20 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1
12 CA
VBAT +
-
-
8 RVTHRES
22
equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/220))** 2.1)) } }
9
ITF86182SK8T SPICE Thermal Model
REV April 1999 ITF86182SK8 Copper Area = 0.76 in2 CTHERM1 th 8 2.0e-3 CTHERM2 8 7 5.0e-3 CTHERM3 7 6 1.0e-2 CTHERM4 6 5 4.0e-2 CTHERM5 5 4 9.0e-2 CTHERM6 4 3 2.0e-1 CTHERM7 3 2 1 CTHERM8 2 tl 3 RTHERM1 th 8 0.1 RTHERM2 8 7 0.5 RTHERM3 7 6 1.0 RTHERM4 6 5 5.0 RTHERM5 5 4 8.0 RTHERM6 4 3 13 RTHERM7 3 2 19 RTHERM8 2 tl 29.7
th JUNCTION
RTHERM1 8
CTHERM1
RTHERM2 7
CTHERM2
RTHERM3 6
CTHERM3
RTHERM4
CTHERM4 5
SABER Thermal Model
Copper Area = 0.76 in2 template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 8 = 2.0e-3 ctherm.ctherm2 8 7 = 5.0e-3 ctherm.ctherm3 7 6 = 1.0e-2 ctherm.ctherm4 6 5 = 4.0e-2 ctherm.ctherm5 5 4 = 9.0e-2 ctherm.ctherm6 4 3 = 2.0e-1 ctherm.ctherm7 3 2 = 1 ctherm.ctherm8 2 tl = 3 rtherm.rtherm1 th 8 = 0.1 rtherm.rtherm2 8 7 = 0.5 rtherm.rtherm3 7 6 = 1.0 rtherm.rtherm4 6 5 = 5.0 rtherm.rtherm5 5 4 = 8.0 rtherm.rtherm6 4 3 = 13 rtherm.rtherm7 3 2 = 19 rtherm.rtherm8 2 tl = 29.7 }
RTHERM5
CTHERM5 4
RTHERM6 3
CTHERM6
RTHERM7 2
CTHERM7
RTHERM8
CTHERM8
tl
AMBIENT
TABLE 1. Thermal Models COMPONENT CTHERM6 CTHERM7 CTHERM8 RTHERM6 RTHERM7 RTHERM8 0.04 in2 1.2e-1 0.5 1.3 26 39 55 0.28 in2 1.5e-1 1.0 2.8 20 24 38.7 0.52 in2 2.0e-1 1.0 3.0 15 21 31.3 0.76 in2 2.0e-1 1.0 3.0 13 19 29.7 1.0 in2 2.0e-1 1.0 3.0 12 18 25
10
MS-012AA
E E1 1 e 2 A
ITF86182SK8T
8 LEAD JEDEC MS-012AA SMALL OUTLINE PLASTIC PACKAGE INCHES
A1
MILLIMETERS MIN 1.35 0.10 0.33 0.19 4.80 5.80 3.80 MAX 1.75 0.25 0.51 0.25 5.00 6.20 4.00 NOTES 2 3 4
SYMBOL A A1 b c
MIN 0.0532 0.004 0.013 0.0075 0.189 0.2284 0.1497
MAX 0.0688 0.0098 0.020 0.0098 0.1968 0.244 0.1574
D 6
D
b
E E1 e H
5
h x 45o
0.050 BSC 0.0099 0.016 0.0196 0.050
1.27 BSC 0.25 0.40 0.50 1.27
c
L
L 0.060 1.52 0o-8o
0.004 IN 0.10 mm
0.050 1.27 0.024 0.6
0.155 4.0 0.275 7.0 MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE-MOUNTED APPLICATIONS
NOTES: 1. All dimensions are within allowable dimensions of Rev. C of JEDEC MS-012AA outline dated 5-90. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.006 inches (0.15mm) per side. 3. Dimension "E1" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 0.010 inches (0.25mm) per side. 4. "L" is the length of terminal for soldering. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. Controlling dimension: Millimeter. 7. Revision 8 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
MS-012AA
12mm TAPE AND REEL
12mm
8.0mm
40mm MIN. ACCESS HOLE 18.4mm COVER TAPE 13mm 330mm 50mm
GENERAL INFORMATION 1. 2500 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
12.4mm
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ITF86182SK8T
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Sales Office Headquarters
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